Advances in 3D Packaging: Focus on Lithography

Originally Broadcast: April 30, 2008
Overview:
Electronics manufacturing is driven towards further integration and miniaturization. This process generates a need for improved manufacturing technologies for IC-based stacked modules. One method for improving the manufacture of 3D interconnection pattern technology is based on photo lithography for low cost miniaturization, cost reduction, and design freedom. Building the latest in ...

 

Sockets that Meet Today's Needs

Originally Broadcast: March 25, 2008
Overview:
Many socket manufacturer designs meet the needs of a wide range of customers. Test sockets must be able to survive a high-volume environment, producing high yields, excellent repeatability, and match an array of package formats. To match the exact interconnect solutions needed, some companies offer innovative custom designs. For high performance fine pitch 0.5mm QFN packages, sockets ...

 

3D Packaging - Part III: Reliability, Test & Inspection

Originally Broadcast: January 17, 2008
Overview:
3-dimensional (3D) packaging exploits the third or Z height dimension to offer a solution for higher integration and performance. Though one begins with known good die (KGD) and pre-tested packages, the reliability of the integrated package is determined using specific steps. Reliability assurance includes moisture resistance testing, autoclave, temperature/humidity, and at the board ...

 

How to Build 3D Packages from Design through Materials & Equipment

Originally Broadcast: December 11, 2007
Overview:
3D packaging is experiencing high growth in new applications by delivering a high level of silicon integration and area efficiency at the lowest possible cost. Integrating off-the-shelf chips from different suppliers offers the function designer a high level of design flexibility at lower cost. But integrating chips with different process technologies (memory, MEMs, SiGe and CMOS) requires ...

 

MEMS: Building in Reliability into Each Process Step

Originally Broadcast: November 30, 2007
Overview:
This webinar covers the building blocks of MEMS processing, including deposition, photolithography, wet etching, reactive ion and deep reactive ion etching. Building a robust microelectromechanical system involves controlling each step carefully. Once the manufacturing process is under control, how can these small devices be tested for reliability? An expert in this area looks at techniques ...

 

3D Packaging - Part I: Which Way to Go

Originally Broadcast: November 15, 2007
Overview:
OEMs are turning to 3D packaging to achieve a high level of functional integration in small form factor. The variety of technologies surrounding miniaturization and the need to cram more functionality into smaller devices has created a dilemma among packaging experts. This creates a lively discussion topic for leading packaging engineers from top firms to leading universities. Everyone ...

 

Emerging Requirements for Wafer-Level Packaging Metrology

Originally Broadcast: May 23, 2007
Overview:
As the growth in high density, high pin count devices accelerates, so does the need for unique wafer-level packaging (WLP). This webcast will discuss the recent trends in WLP and several of the key process problems and solutions, concentrating on:

• WLP market trends and projections
• WLP design factors that must be met for WLP solutions for devices with high levels of ...