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Industry News 2008 P12
SUSS MicroTec To Develop Nano Imprint Technology with Philips Research
(April 29, 2008) Munich, GERMANY — SUSS Microtec and Philips Research, Eindhoven, Netherlands, announced a license agreement to develop an enabling technology called substrate conformal imprint lithography (SCIL). The intention is to bring existing equipment platform with additional nanoimprinting (NIL) feature to the market, enabling new approaches to large-area imprint applications.
StratEdge Facility Certified for ISO 9001:2000
(April 28, 2008) San Diego, CA — StratEdge, provider of semiconductor packages for microwave, millimeter wave, and high speed digital devices, announces that it has received ISO 9001:2000 certification for its facility that opened in November 2007. Achieving certification indicates that StratEdge meets specific requirements for a quality management system.
Mentor Graphics Names New Vice President
(April 24, 2008) Wilsonville, OR— Mentor Graphics Corp. announced the promotion of Simon Bloch to V.P. and general manager of the Design and Synthesis Division. Bloch is responsible for Mentor Graphics' field programmable gate array (FPGA) and Electronic System Level (ESL) design and synthesis products.
Book-to-Bill Drops Back after February Surge
(April 24, 2008) San Jose, CA — After a brief surge in February, when the book-to-bill ratio for North American semiconductor equipment reached .92, it has slipped back to 0.89 for March 2008, the same average as January, 2008. On the bright side, total billings for March — 1.29B — was only 1% lower than February's 1.31B, and slightly more than January's billings of 1.28B.
3D Packaging Technologies Expected to Dominate Industry
(April 23, 2008) Palo Alto, CA— 3D packaging is expected to emerge as a dominant performing solution in the electronic/chip packaging industry. Its performance promises to drive efforts across the entire supply chain to successfully deploy it, according to analysis reports from Frost & Sullivan's Global Trends in Electronic/Chip Packaging. Analysis indicates that the industry is moving beyond system on chip (SoC) to explore various forms of system in package (SiP).
iNEMI to Hold European Workshop For 2009 Roadmap
(April 23, 2008) Limerick, IRELAND— The International Electronics Manufacturing Initiative (iNEMI), an industry-led consortium focused on identifying and closing technology gaps, has scheduled a workshop in Europe so industry members can review the work in progress on the 2009 iNEMI Roadmap. The all-day workshop will be held June 18, 2008 at IMEC in Leuven, Belgium.
Oerlikon Esec Honored by Infineon
(April 22, 2008) Cham, Switzerland — For the fifth consecutive year, Oerlikon Esec was recognized by Infineon Technologies, Sdn. Bhd; but for the first time, the company received awards in both Best Performer and Best Supplier catgories for 2006/07. The two companies have been working together on the realization and implementation of a copper wire bonding project.
Lee to Deliver Keynote at MEPTEC MEMS Packaging Symposium
(April 18, 2008) Medicine Park, OK — Luke P. Lee, Ph.D., from the Department of Bioengineering at UC Berkeley has been selected as keynote speaker for MEPTEC's 6th Annual MEMS Packaging symposium titled "MEMS Market Evolution: From Technology Push to Market Pull" on May 22, 2008. This one-day event will take place at the Wyndham Hotel, San Jose, CA.
IPC Releases Revision of BGA Standard
(April 18, 2008) Bannockburn, IL — IPC as announced the release of IPC-7095B, "Design and Assembly Process Implementation for BGAs". Implementing ball grid array (BGA) and fine-pitch ball grid array (FBGA) technology presents unique challenges for design, assembly, inspection and repair personnel, especially in light of recent changes in alloys and surface finishes.
StratEdge Unveils Small Outline Thermally Enhanced Package Series
(April 17, 2008) San Diego, CA — StratEdge, provider of semiconductor packages for microwave, millimeter wave, and high speed digital devices, announces the introduction of a family of small outline thermally enhanced molded ceramic packages for power semiconductors that can be used for silicon, silicon carbide, gallium nitride, and other compound semiconductors in power integrated circuit applications.
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