Advanced Packaging - Online Interview: Ziptronix Joins Low-cost Quest for True 3D-IC

By Françoise von Trapp, managing editor
(October 21, 2008) MORRISVILLE, NC — Throwing its hat in the ring with a host of R&D labs, fabs, foundries, equipment and material manufacturers, IP companies, and packaging houses in search of low-cost 3D integration processes, Ziptronix, Inc. revealed technical details on its direct bond interconnect technology (DBI), which is said to enable low-cost wafer-to-wafer or chip-to-wafer bonding without high-temperature compression.

Companies and consortiums have been lining up with processes to solve different parts of the equation for some time, such as with the the EMC^3D Consortium's recent announcement that they've achieved a via-first process flow for TSVs at $189/wafer. Dan Donabedian, CEO, Ziptronix, says he has observed a growing consensus across the semiconductor supply chain that a low-cost high-throughput, reliable bonding process is necessary to bring 3D IC integration into the mainstream. What is well-established, he noted, is that TSVs are going to be part of any large-scale 3D IC process, and that metal-to-metal bonding offers clear advantages. Ziptronix' contribution is what Donebedian defines as the final part of the equation; a high-throughput, low-temperature, oxide bond technology that achieves a metal connection without requiring low-throughput, high-temperature, thermal compression.

In a comparison study done by Yole Développment, DBI proved to have a lower bonding cost per wafer than either copper-to-copper thermocompression or adhesive bond process. For a typical fab running 500,000 300mm wafers per year using 1×20µm vias, the bonding costs per wafer level (including CMP) were: $57 for Cu-Cu; $22 for adhesive; and $12 for DBI (Figure 1). According to Chris Sanders, Ziptronix' director of business development, key elements to cost savings of the companies proprietary Zibond and DBI processes include use of nickel as an interconnect metal; the elimination of thermocompression and its associated tool requirements (bond chambers, thin wafer/die handling); increased throughput due to reduced cycle time (no adhesive, pressure, temperature requirements); and the ability to batch process.

Sanders explained that batch processing can't be done with thermo-compression because of the need for heat. But Zibonding technology is a room temperature oxide bonding process that allows wafers to be bonded and stored before completing the final interconnect processes. "You can do Zibond at room temperature and achieve a bond," he said, "Then in DBI you add heat to achieve the electrical connection between the nickel pads." He added that while the processes accommodate TSVs, interconnects can be achieved without them.

Initially developed as a way to assemble 3D subsystems — doing away with traditional packages, and instead bonding and interconnecting bare die directly onto a board-mountable substrate — it was a technology whose market was not yet ready for it. However, according to Donabedian, the market has caught up. One indicator of this, he says, is the difference in attendees at 3D symposiums and conferences. Rather than engineers, he's noticing more business development and marketing executives in the audience, which he considers to be an indicator of market readiness, as they educate themselves on these technologies.

Military contractors have been the first to incorporate Zibond and DBI, and Sanders identified CMOS image sensors, focal plane arrays (FPAs), memory-logic stacks as the next target applications. Although Ziptronix is not part of any consortium targeting 3D integration processes, Sanders and Donabedian said the company is working with tool vendors such as EV Group and SUSS MicroTec to enable their technology, and have formed an affiliation with Tezzaron to establish roadmaps for 3D stacked memory.

While most industry analysts still point to 2011 for TSV production, Donabedian predicts earlier adoption. "Those who want to take the lead in the market will find the value-add," he noted, "I'd put my money on Q3 2010 (for TSV production)." He says the logistics chain is different from 12 months ago, when foundries and customers were tossing technology limitations back and forth. He says now he sees them working together to understand the dynamics, and that most of the end customers have roadmaps for 3D.

Despite the downturn in the economy, Donabedian is enthusiastic about bringing Zibond and DBI to market, because companies are interested in new technologies that might give them an advantage. "They are opening their doors to Ziptronix right now," he says. "The timing is perfect."

Ziptronix 3D IC technology is available for license to OEMs/IDMs, such as manufacturers of high-performance imaging systems and sensor arrays, mobile electronics, consumer electronics and portable gaming systems; to foundries seeking to implement TSV technology and to OSATs (Outsourced Semiconductor Assembly & Test) vendors.

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