Advanced Packaging - From the Editor

More Functionality in One Editor
I guess it's time to put my money where my mouth is. I've been spouting off for months about how important it is for everyone in the semiconductor and electronics industries to learn about technologies across the supply chain. For the past three years, as associate and then managing editor of Advanced Packaging magazine, I've been immersed in back-of-the-line technologies, while only dabbling in the front-end and board assembly where the technologies overlap. However, as that front-end/back-end line fades away, my understanding of front-end technologies is increasing. So it only made sense to take on SST's managing editor hat to wear as well. All the same, I'm beginning to empathize with the plight of advanced packages. More and more functionality (duties) is being crammed into less space (time). I'm thinking, thermal and power management issues (stress) might need to be addressed. If I don't watch out, I'll be a walking example of CTE mismatch.

But even with the challenges to overcome, technologies aimed at reduced package size seem to solve the big picture issues facing the semiconductor industry as a whole. STATS Chip PAC just announced a USB flash drive design that uses system-in-package (SiP) and 3D die stacking technology to integrate NAND flash memory die, controller and passives onto a single packaging substrate. The concept here is that by integrating all key components into a single package saves space and allows for more effective signal routing at a lower overall cost. I guess the analogy could be made that integrating the components (duties) of SST and AP managing editors into a single package (me) achieves a similar goal.

Luckily, the synergies between the two publications are becoming more and more profound as more traditionally front-end players, like Lam Research, Semitool, and Cadence Design Systems take on wafer-level packaging process design and development. Equipment manufacturers and materials suppliers are also leveraging technologies into areas spanning the supply chain. Take DEK International, for instance, which I visited on a recent roadshow. Their printing platform got its start in the SMT market, but has expanded to include semiconductor packaging processes and most recently entered the PV market.

Industry collaboration is also often newsworthy to both publications. For example, recent news from STMicorelectronics, STATSChip PAC, and Infineon, who have teamed up to jointly develop the next-generation of embedded wafer-level ball grid array (eWLB) applies to both publications. Likewise, the columns in this issue contributed by Carsten Barth of Elcoteq and Jim Stratigos of Jacket Micro Devices, offer valuable insight to both readers of AP and our other sister publication, SMT magazine (we're a big family here); as does George Riley's report of the Evolving Technologies Summit, part of this year's SMTA International.

So I guess to streamline processes and achieve more effective routing of information, I'll be immersing myself more in front end technologies and the synergies between the front- and back-ends, so that we can expand the breadth of coverage both publications for our readers. If the line disappears altogether, we'll be ready for it. Hopefully, we'll all learn something.

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